HI5735KCBZ【PDF 5/11 页】CONV D/A 12BIT 80MSPS 28-SOIC

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Sheet目录1995

1页 2页 3页 4页 [5页]6页 7页 8页 9页

HI5735

Absolute Maximum Ratings

Thermal Information

Digital Supply Voltage VCC to DGND . . . . . . . . . . . . . . . . . . . +5.5V

Negative Digital Supply Voltage DVEE to DGND . . . . . . . . . . -5.5V

Negative Analog Supply Voltage AVEE to AGND, ARTN . . . . -5.5V

Digital Input Voltages (D11-D0, CLK) to DGND. . . . . DVCC to -0.5V

Internal Reference Output Current. . . . . . . . . . . . . . . . . . . .

±2.5mA

Voltage from CTRL IN to AVEE . . . . . . . . . . . . . . . . . . . . 2.5V to 0V

Control Amplifier Output Current . . . . . . . . . . . . . . . . . . . . .

±2.5mA

Reference Input Voltage Range. . . . . . . . . . . . . . . . . -3.7V to AVEE

Analog Output Current (IOUT) . . . . . . . . . . . . . . . . . . . . . . . . . 30mA

Operating Conditions

Temperature Range

HI5735KCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC

Thermal Resistance (Typical, Note 1)

JA (

oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum Junction Temperature

Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications

AVEE, DVEE = -4.94 to -5.46V, VCC = +4.75 to +5.25V, VREF = Internal TA = 25

oC for All Typical Values

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

SYSTEM PERFORMANCE

Resolution

Bits

Integral Linearity Error, INL

(Note 4) (“Best Fit” Straight Line)

0.75

1.5

LSB

Differential Linearity Error, DNL

(Note 4)

0.5

1.0

LSB

Offset Error, IOS

(Note 4)

Full Scale Gain Error, FSE

(Notes 2, 4)

Offset Drift Coefficient

(Note 3)

0.05

A/oC

Full Scale Output Current, IFS

20.48

Output Voltage Compliance Range

(Note 3)

-1.25

DYNAMIC CHARACTERISTICS

Throughput Rate

(Note 5)

MSPS

Output Voltage Full Scale Step

Settling Time, tSETT Full Scale

±0.5 LSB Error Band RL = 50

(Note 3)

-20-

Single Glitch Area, GE (Peak)

RL = 50 (Note 3)

pV-s

Doublet Glitch Area, (Net)

-3-

pV-s

Output Slew Rate

RL = 50, DAC Operating in Latched Mode

(Note 3)

1,000

Output Rise Time

RL = 50, DAC Operating in Latched Mode

(Note 3)

675

Output Fall Time

RL = 50, DAC Operating in Latched Mode

(Note 3)

470

Differential Gain

RL = 50 (Note 3)

0.15

Differential Phase

RL = 50 (Note 3)

0.07

Deg

Spurious Free Dynamic Range to Nyquist

(Note 3)

fCLK = 40MHz, fOUT = 2.02MHz, 20MHz Span

dBc

fCLK = 80MHz, fOUT = 2.02MHz, 40MHz Span

dBc

REFERENCE/CONTROL AMPLIFIER

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